Design Of Video Image Acquisition And Edge Detection System Based On FPGA

Video surveillance system plays an important role in daily trafific,security and other fields.With the rapid development of science and technology,traditional surveillance technology can no longer meet people's needs.Now surveillance technology combined with image processing algorithm can accurately track and recognize faces and moving objects,while edge detection algorithm can extract important information of images,which is to achieve follow-up.Complex algorithm is an important foundation,so the accuracy and speed of edge detection have an important impact on the follow-up algorithm.Compared with the serial processing method of software,it has low efficiency and poor real-time performance in dealing with a large number of image data.In this paper,a video image acquisition system is designed based on the characteristics of high-speed parallel processing data and pipeline technology of FPGA,and a real-time edge detection system based on improved Canny algorithm is designed,which combines the Canny algorithm with the best comprehensive effect of edge detection.Its main contents are as follows:1.The principle of traditional Canny algorithm is briefly introduced and improved.Firstly,the adaptive median filter is used instead of Gauss filter to enhance the ability of suppressing salt and pepper noise.Secondly,Using 3×3 detection template of Sobel operator instead of traditional 2x2 template to reduce the generation of isolated edge points and pseudo edge points,The idea of median filtering combined with mean filtering is used to obtain adaptive threshold in domain window.Finally,the improved Canny algorithm is validated by using MATLAB software.2.Using EP4CE6F17C8N of Cyclone IV series of Altera Company as the main control chip,the video image acquisition system is designed.The system includes image acquisition module,I2C interface and register configuration module,SDRAM buffer module and VGA display module,which are composed of OV7725CMOS camera.The functions of the above modules are briefly introduced and analyzed.At the same time,the communication timing of each module is also analyzed by using Verilog HDL language is used to write logic code.3.Design the software of each module in the improved Canny algorithm by using FPGA.In the design of adaptive median filter module,the median,maximum and minimum values of 3×3 and 5x5 windows are obtained by fast sorting method,and the merge insertion method is used to reduce the number of comparisons for 5x5 windows.The designed modules are added to the video image acquisition system to form a complete real-time edge detection system.4.Use Modelsim simulation software to validate the functions of each module.After the time series validation is passed,use Quartus Ⅱ 13.0 software to compile and synthesize each module.Burn the file extended to sof on the development board to observe the experimental phenomena.The improved Canny edge detection effect is better than the traditional algorithm.