Image Acquisition And Processing System Based On FPGA

In the image acquisition and processing systems, real-time requirement is often an important performance of the system. This paper applies embedded system design and image processing technology and presents a FPGA chip as the processor's embedded parallel video image data processing system design on the base of the analysis of video image processing techniques and methods.In this paper, the study includes:First, this paper analysises the video image data acquisition methods, and designs image acquisition hardware and software system. On the hardware circuit, this paper designs the image acquisition card, and through I2C bus on the mode of image acquisition card configuration, under the control of the acquisition module, the images are deposited in the SRAM. In software design, this paper applies modular design, the system is composed of asynchronous FIFO model, image space converting module, SRAM imaging storing control module, image pre-processing module. It resolved the problems such as image sampling store and processing.Second, this paper analysises some of the linear and nonlinear filtering image processing algorithms. A fast image median filtering algorithm is proposed in the paper based on the advantages and disadvantages of those filtering algorithms. it is provided that fast median filter on FPGA for image low-level processing and its hardware structure diagram, then realizes it by VHDL language. The results show that this fast median filter can lower the system resources share and promote system speed, enhance real-time performance.Third, research based on the video image detection algorithm, focusing on the statistical background subtraction method, image binarization. Using VHDL language implements them on the FPGA, and made functional simulation and performance analysis.Finally, system simulation and verification is a very important step in the FPGA design flow. If manually set the simulation input waveform, it will be a heavy workload and low efficiency. In this paper, VHDL test bench and TEXTIO package are used to resolve this problem. It can be a good solution to this problem. The test bench output the simulation results, and then display in the Matlab.In this paper, it make use of FPGA's parallel processing and pipelining technology, research and design the video image acquisition and processing system of occupying less system resources, high speed, real-time performance and it has practical value and application prospect.