Failure Analysis On And Yield Improvement Of The Flash Embedded Microcontroller Unit MC68HC908RF2 In The Burn In Stage

In the family of the MC68HC908 Microcontroller Units, MC68HC908RF2 unitare designed as the CSIC. Before shipped to customers, the industry program ofMC68HC908RF2 should be written into the embedded Flash memory. Needless tosay the customers' focus is primarily put on the data stored in the memory. Hence theproperty of the data retention is crucial to the performance of the Flash memory. Asauto electronics, the Burn In stress is indispensably performed on the memory so as tomeet the customs' requests. Meanwhile the industry program will be written into theFlash memory for saving time cycles. And the subsequent tests are to check the twoflag bytes, and then screen the good products.This thesis focuses on the MC68HC908RF2 applied in the Remote Keyless Entry.The corresponding Burn In test contains one hour Bulk Erase and 512 Write/Erasecycles as well as an hour's industry program. However the situation was exceptionalin every temperature conditions of the Final Test since the WW27, especially in thehot condition. The reliability of our products had been undermined;meanwhile thecost had been greatly enlarged. So the first priority is to solve the Burn In issues.My thesis was performed in BAT3 of Motorola (China) Electronics Limited. Theexperienced PEs and corresponding PMs gave me great favors to propel my task aswell as the RF2 team members. In addition, I still obtained specialized supports in theFailure Analysis from Product Analysis Lab. Burn In testing utilized the Burn-inOvens supplied by KES, Final Test was performed by the J750 Tester manufacturedby Teradyne as well as the UTS handler.After data collected and carefully studied, three major issues are proposed andshown as follows:1. Whole or half board failure issue;2. Socket issue to cause Bin2 failure;3.#71 Programming Disturb failure.As to the first two issuses, we updated the boards after the properties evaluation.Guided by the Tunnel Reverse Theory, I performed the failure analysis on the #71failures and studied its mechanism. Consequently the results were submitted to theFab, the enhanced gate process was favor to decrease of the corresponding costcaused by the process defaults.