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Failure Mode Analysis And Yield Improvement Study On Thin Die (25UM) NAND Flash Assembly

Posted on:2018-03-14Degree:MasterType:Thesis
Country:ChinaCandidate:Z H QianFull Text:PDF
GTID:2518305963995329Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
By the end of electronic products to thin,short,flash package tends to be thinner,stacked layers of more and more,in order to maximize the capacity of a single flash chip.25 um thin die of this research with 16 layers of stack up technology at the forefront in the Assembly industry,the failure mode of this kind of Assembly technology extreme chip thickness and stack structure,which has practical significance.This paper studies the defects and failure mode is also unique in the Assembly process,which has an excellent reference for the future Assembly process further breakthrough.In this paper,the failure model effectiveness analysis tooling was introduced in detail.The defects which happened on thin die NAND Flash Assembly process such as die chipping,die crack and substrate broken were analyzed and concluded.Several different process improvement methods(Wafer expanding parameter optimization,Wire bond parameter optimization,Machine track modification and substrate carrier utilization)were found for these defects mechanism to improve the process yield of Assembly process.By using different instrument and equipment like high-power microscope,wafer inspection microscope,bond tester,the experiment inspected the appearance of the product and collected the related data.Used JMP to design the DOE plan and analysis the experiment result.The experiment results showed that the parameters of wafer expanding had a significant effect on the die chipping.The optimized wafer expanding parameters from DOE(Expanding time 30 s,Expanding height 8mm,Expanding temp.65?C)can effectively reduce the occurrence of die chipping through die warpage improvement.The results also showed the influence of wire bond parameters on chip crack initiation.The optimized wire bond parameters from DOE(Bump USG 48?52m Aps,Time 24 ms,Bump Force 13?15gf,Multi bond USG 38?42m Aps,Multi bond Force12?14gf)can effectively reduce the die crack rate.And machine track modification and substrate carrier improved Assembly yield through substrate broken improvement.The defect rate of die chipping,die crack and substrate broken accounts for more than 84% of total thin die Assembly defects.After mass product validation,the final yield of Assembly get 3% improvement.The reject rate is decreased and process cost also can be reduced.
Keywords/Search Tags:Thin die, Assembly defect, Yield, DOE, JMP
PDF Full Text Request
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