Integration And Optimization Of Advanced Split-gate Flash VLSI Manufacturing

VLSI (Very Large Scale Integration) manufacturing is a new cross discipline, which is based on microelectronics and related to multiple science fileds. How to effectively integrate and optimize thousands of complex processes for the chip smooth mass production is a subject both with academic and market values.In this thesis, a new viewpoint, model-based integration and optimization, was presented and used to guide the process optimization and device performance improvement for split-gate Flash VLSI manufacturing, combined with the real problems in mass production.First of all, Floating-gate Dynamic Erasing Equation was created to describe the dynamic erasing characters in split-gate Flash devices. By solving this equation, the analytical expression of the floating-gate voltage was obtained. Because the device structural parameters included in this expression could be determined by measurements or reasonable approximations, the floating-gate voltage was calculable. Consequently, a practical double-gate cell model was established, which closely correlated the device structural parameters and device performance. This model was then proved by the comparison between its simulation results of device characteristics after cell erasing and the experimental data.For model-based process optimization, the effects of tunnel oxide thickness vibration to device performance were firstly analyzed by the established double-gate cell model. Based on the enough acknowledgement of film growth characters of ISSG (In-Situ Steam Generation) technology, the deposited tunnel oxide was planarized...