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Development Of Dual-Channel High-Speed A/D Module

Posted on:2011-10-14Degree:MasterType:Thesis
Country:ChinaCandidate:M M YuFull Text:PDF
GTID:2178330338979852Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of digital technology, the requirement of data acquisition system is higher and higher in some special application, which demands high sampling rate, large memory depth and a high-performance computer I/O bus as a communication interface. The thesis designs a dual-channel high-speed A/D module based on PCI Express. The thesis mainly researches the hardware and software designing of dual-channel high-speed data acquisition based on the PCI Express bus module. Adopting the high-speed ADC, FPGA, DDR2, PCI Express, module achieves 198MSa/s highest sampling rate , 13-bit resolution and 256MB cache.During the hardware designing, according to the module specifications, a design scheme of hardware circuit is presented and the selection of key chips is discussed. In the design of analog channl, the AC/DC coupling circuit, 1MΩ/50Ωinput impedance, programmable amplification/attenuation and low-pass filtering circuit are implemented. Special clock generater is used, which can generate a smaller aperture jitter sampling clock for ADC, a smaller aperture jitter sampling clock can effectively improve the ADC dynamic performance. In the design of high-speed large cache, DDR2 SDRAM is the cache of this module, which greatly improve the memory depth up to 256MB. DDR2 has high data transfer bandwidth that can meet real-time sampling data storage of dual-channel ADC. Using special bridge chip PEX8311 improves the reliability of the design of PCI Express bus interface. This chip realizes the protocol conversion of the PCI Express bus and the local bus, which has enrichment local bus operation mode, data transfer mode and provides user powerful operation scheme of local bus. FPGA is used as the main controller in this module to control the data collecting, internal and external triggering and each part of the circuit. Using the theory of signal integrity, the thesis proposes the design of high-speed signal circuit and PCB placement and routing program in FPGA, DDR2 and PCI Express high-speed interface, which ensures the quality of high-speed signal.In the software development, Microsoft Visual Studio 2008 and NI Measurement Studio are used as software development platform. Using software development kit of PLX company, the thesis designs the PC application which has data acquisition controlling, data display controlling, the sampling rate setting, analog channel parameter setting, trigger parameter setting, self-test, hardware reset function and so on.Finally, comprehensive testing and performance analysis are conducted. Testing results show that functionality and technical specifications of the designed data acquisition module meet the design requirements.
Keywords/Search Tags:High-speed data acquisition, PCI Express, FPGA, DDR2 SDRAM
PDF Full Text Request
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