Reconfigurable Design Of LDPC Decoder

The Low-Density Parity-Check (LDPC) code has attracted tremendous attention due to its remarkable error-correcting performance, low decoding complexity and highly parallel implementation character. As a result, LDPC code has been adopted by several communication standards, such as IEEE 802.16e, IEEE 802.11n and DVB-S2. To ensure the reliability and effectiveness of information in different environment, several code lengths and multi-rate LDPC codes are presented. How to design a low complexity, small size, flexible architecture and reconfigable LDPC decoder is the research focus. In view of this, through the research of the existing decoding algorithms and decoders of LDPC code, three novel design of low complexity, high-throughput and reconfigable LDPC decoders are presented in this paper. The main contents of this paper are shown as follows:1,Design of high-throughput Quasi-Cyclic LDPC (QC-LDPC) decoder: an improved QC-LDPC decoder is presented based on semi-parallel structure which is lower complexity in hardware. Normalized min-sum (NMS) algorithm based on layered decoding is adopted. Moreover, redundant iterations can be eliminated by advanced testing technology to achieve high-throughput. In addition to, detection is started after 5 iterations to reduce invalid detections based on the Matlab simulation results. Experiments show that the decoder has high-throughput, which up to 1.26 Gbps.2,Design of multi-rate QC-LDPC decoder: a novel multi-rate QC-LDPC decoder is presented according to the similarity of parity-check matrices. NMS algorithm based on layered decoding and semi-parallel structure are also adopted in this design. It can support any code rates without any changes in hardware to achieve higher hardware utilization. The update of current layer and the comparison of next layer are processed simultaneously to improve the throughput. The check-to-variable messages are stored indirectly to reduce the storage space.3,Design of Turbo decoder based on min-sum (MS) decoding algorithm of LDPC code: a novel design of Turbo decoder is presented according to the low-density feature of Turbo code. Turbo code is decoded by the MS decoding algorithm of LDPC code to improve the throughput, which is a low complicated decoding algorithm. Experiments show that the decoder has high-throughput, which up to 44.3 Mbps. The ModelSim SE6.0 simulation results indicate that the designed decoders have correct function. The high-throughput QC-LDPC decoder and multi-rate QC-LDPC decoder can support other QC-LDPC codes by reconfiguring the number of computing units.