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Research And Implementation Of 5G Turbo Decoder Basesd On Multi-core CPU/GPU

Posted on:2018-06-13Degree:MasterType:Thesis
Country:ChinaCandidate:M Y BiFull Text:PDF
GTID:2348330542469332Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
As an approximation to the Shannon limit,Turbo code has the advantages of outstanding error correcting ability and low coding complexity.Due to those advantages,Turbo code becomes one of the error control codes in 3G and 4G mobile communication systems.In order to meet the requirements of high speed,high quality,multi scene and multi network convergence for rapid-developing mobile communication,National Mobile Communications Research Laboratory of Southeast University use C-RAN based network architecture,devoting to key-technology researching of 5G mobile communication system.Baseband signal processing in the corresponding 5G experimental system is mainly carried out by software application,and requires for throughput of Turbo decoder is further improved.Thus,software application and optimization of Turbo decoder is a research subject with practical value.The relevant research findings can be applied to the C-RAN based LTE-Advanced system.In this paper,we study and implement a parallel Turbo decoder based on CPU or GPU,which is suitable for the 5G experimental system of National Mobile Communications Research Laboratory of Southeast University.This Turbo decoder is based on max-log-MAP algorithm,it maximize the decoding throughput by reducing the decoding complexity and improving the computational Parallelism.The Haswell architecture CPU that launched by Intel and the Broadwell architecture GPU that launched by Nvidia support hardware-level Parallelization,which is suitable for processing state metric recursion in Turbo decoding and other Parallel computation.We use different decoding optimization scheme on CPU and GPU:1.Turbo decoding on CPU set based optimization in the AVX instructions,use fixed-point calculation,look-up table interleaver,forward and backward state metric vector Parallel computing,and multi-block Parallel decoding in vectors and between threads;2.Turbo decoding on GPU set based optimization in the CUDA instructions,using floating-point calculation,sub-block decoding,look-up table interleaver with memory optimization,and Parallel decoding between thread blocks.The results show that the optimized Turbo decoder has excellent throughput performance for each processor hardware platform,and meets the performance requirements of Turbo decoder in 5G experimental system.
Keywords/Search Tags:Turbo decoder, Parallelization, throughput, CPU, GPU
PDF Full Text Request
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