The Design Of Dual-Mode Decoder Based On LDPC And Turbo

Advanced error correcting technology is needed to assure reliability of transmission message in modern wireless communication system.LDPC and Turbo have been widely researched due to their good performance close to Shannon limit.Although different error correcting codes are adopted in different communication standards,integration is of certainty in the future,and many communication systems adopt more than one error correcting schemes.Therefore,as single-mode decoders are developing steadily,it is necessary to study flexible multi-mode and multi-standard decoders.Under the background,our paper is focusing on the implementation of resource-saving LDPC/Turbo decoder.Firstly,our paper studies different algorithms of LDPC and Turbo,and chooses suitable one as the dual-mode algorithm.According to the method of simplifying nonlinear function,there are two approximation algorithms called LUT-log-MAP and MAX-log-MAP.Combining their advantages and disadvantages,we propose a new algorithm called MIX-log-MAP which uses different approximation methods in state-metric calculation and extrinsic information calculation.Simulation results show that,the performance of MIX-log-MAP is improved by 0.2dB when compared to MAX-log-MAP(when BER equals to 10-3).If compared to LUT-log-MAP,MIX-log-MAP has a loss of 0.1d B in performance with a sharp decrease in the number of LUTs.Then we apply MIX-log-MAP in dual-mode decoder,and design shard computing modules including branch metric module,state metric module and extrinsic information module according to the similarity of LDPC/Turbo decoding flowchart.16 LUTs are used in state metric module in each SISO,while 54 LUTs are used in each SISO.There is a decrease of 70% in the number of LUTs.Lastly,as recent research focuses on the internal structure of the decoder,our paper study the relation between Turbo interweave network and LDPC shifting network,and we find that LDPC shift register can be used to get permutation address in Turbo block.The designed dual-mode data switch network,is benefit for resource-saving dual-mode decoder.There is a decrease of 8.5% in logic elements in contrast with the traditional method.Aiming at designing dual-mode decoder with good performance and low resource cost,our design can support LDPC codes with 6 rates,and 3GPP-LTE,TD-LTE Turbo codes with different code lengths.In summary,we improve the decoding algorithm and design shared computing modules.What's more,we combine LDPC shift network and Turbo interweave network and propose a dual-mode data switch network,which is prospect-promising for designing other shared modules in dual-mode decoder.