Application Of Signal Integrity Analysis In High Speed Data Acquisition System Based On AD9434

The introduction of new processes makes the chip steadily improve its performance while reducing power consumption,however,the performance improvement inevitably accompanies the increase of the operating frequency.High frequency means shorter rise time,from the microsecond CMOS devices,nanosecond to gallium nitride devices picosecond level,all highlight the digital signal rise time gradually shortened.The smaller the rise time is,the more the high-frequency components are contained in the signal,the lower the tolerance to noise.PCB traces on the introduction of the via,alignment angle and spacing changesmay lead to reflections,crosstalk and other signal integrity issues.In response to this situation,PCB design also needs to keep pace with the times,at the beginning of the design to evaluate the overall program to identify the key problems that may exist and focus on the design process.Taking the design of high-speed data acquisition system as an example,this paper focuses on the key signal networks of AD9434 high-speed ADC and XC6SLX16 FPGA,and uses HyperLynx software to analyze the signal integrity of high-speed clock,LVDS bus and differential peer trace during the design process.Accorrding to the results of the analysis of the design stack,the development of alignment constraints,the rational layout PCB layout design,the key alignment termination.After completing the PCB design,the above network topology is extracted for post-simulation to verify the termination effect and set up the environment for actual data acquisition testing.Proven,the highest sampling clock AD9434 at 200MHz when the system is stable,accurately restore the PS/2 keyboard radiates the information and the results displayed on the HMI screen.