Design And Implementation Of UHF RFID Reader Based On FPGA

RFID is a radio frequency wireless communication implemented using non-contact automatic identification technology. With the technology developing of the Internet of Things, UHF RFID reader supporting ISO/IEC 18000-6C protocol has become the focus and hot spots in the field of R & D. Therefore, the study and design of the UHF RFID reader has important theoretical and practical significance.This thesis come from small home appliances reliability test system research fund project with intelligent wireless network of the Guangdong Provincial Economic and Trade Commission.Designed and implemented Baseband signal processing module, ISO/IEC18000-6C protocol analysis module and anti-collision algorithm module for multi-tag identification in FPGA in this paper;Solved the modem and demodulation problem by configuring CC1101 module to the asynchronous transparent communication mode;Using Matlab.completed the system-level time domain simulation and the system-level frequency domain simulation at the UHF RFID reader system. Implemented the 915MHz UHF RFID reader supporting ISO/IEC18000-6C protocol and distinguishing multi-tag quickly on the ARM9 and FPGA embedded development platform,and completed the system testing.The main tasks involve the following aspects:(1) Analysised the features and indicators of EPC Gen2 protocol.researched the system principles and basic structure of UHF RFID reader,discussed the spread characteristics of system communication link route.(2) Two CC1101 modules were respectively responsible for receiving and sending task, designed and implemented the hardware configuration and underlying drivers of the RF channel module; and the FPGA development board is mainly focused on processing baseband signal and analysising ISO/IEC18000-6C protocol.(3) Analysised mainly the ISO/IEC18000-6C protocol,designed and implemented PIE encoding module, FM0 decoding module,operating tags function module, anti-collision algorithm module for multi-tag identification based on the model predicting the quantity of tags and the sampling theorem, all-digital phase-locked loop(ADPLL) module and Communication interface module supporting ISO/IEC18000-6C protocol on the CycloneⅡEP2C5T144C8.(4) Using the Simulink,completed the system-level time domain simulation at the receiving system and sending system of UHF RFID reader;using Matlab communication functions,completed the system-level frequency domain simulation at the UHF RFID reader system.(5) Testing Systematically the hardware and software development system of UHF RFID reader, transplanted successfully the WinCE6.0 system on the ARM9 development board.