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Parameter-configurable ASIP Assembler With RISC/VLIW Structure

Posted on:2012-01-08Degree:MasterType:Thesis
Country:ChinaCandidate:W LuoFull Text:PDF
GTID:2178330332987366Subject:Intelligent information processing
Abstract/Summary:PDF Full Text Request
In the application of digital signal processing, traditional processors like DSP or ASIC can no longer fulfill customers'need on high-flexibility and high performance. ASIP (Application Specific Instruction set Processor), combines the advantage of ASIC and the advantage of DSP. So it can be programmable and efficient. This outstanding feature has proved to be an big success in many fields. The design of ASIP mainly includes two parts: Hardware design and software design. In this paper, we focus on the software design, also known as the design of an ASIP assembler.First, in the project"The design of a RISC structure parameter configurable ASIP platform", the design of the assembler was introduced, it includes the design of the user interface, and the main part, the design of the assembling function. The assembler can generate different code files with different structure based on the parameters users set. Also, it has error informing function and disassembling function.Second, in the project"The design of a VLIW structure ASIP", the design of the assembler was introduced, and it improves ILP (Instruction Level Parallelism) by dynamic scheduling and register renaming. This assembler can also inform errors and disassemble.
Keywords/Search Tags:ASIP, RISC, VLIW, ILP, Dynamic Scheduling, Register Renaming
PDF Full Text Request
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