The Research Of ATE Test Vector Conversion Method

With the development of semiconductor technology, the scale and complexity of IC devices are increasing, the vectors are huge and the timings are complex, the testing becomes more and more difficult. The test patterns generated from EDA tools will not be applied directly, they must be converted to ATE formats first. Test vector conversion becomes a very key approach. Test vector conversion must consider the syntax of patterns and the timings of ATE synthetically. Otherwise, the conversion or the debugging of test program will be failed. Generally, test vector conversion is very troublesome, it will affect the cost and the time-to-market of IC devices.This dissertation discusses the technology of ATE testing firstly, analyzes its advantages and disadvantages, analyzes the syntheticism of ATE test signal, studies the methods of load board design, test vector conversion, test program debugging and test program optimization. We analyze the process of test vector conversion, research the key techniques of VCD level separation, test timing extraction, test vector generation and test vector compression. We study the timing of ATE and the syntax of VCD file, then propose an intelligent and efficient optimization algorithm for ATE timing, and hold the format of VCD file.This dissertation selects the test system of Agilent 93000 SOC Series, make use of PERL script, and develop ATE test vector conversion software which integrates timing optimization and vector compression. It improves the efficiency of conversion, shortens the debugging time and obtains an efficient service for IC designer.