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Reasearch On Error Vector Magnitude Testing Technology

Posted on:2022-01-29Degree:MasterType:Thesis
Country:ChinaCandidate:J X HanFull Text:PDF
GTID:2518306524992169Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of digital communications today,digital quadrature modulation has been widely used,and various civil and military communications equipment have put forward higher and newer requirements for testing.Traditional measurement parameters such as bit error rate and signal-to-noise ratio cannot accurately diagnose and locate the error loss details in the communication system.Error Vector Magnitude(EVM)is a key parameter to measure the communication system.It can intuitively and quickly reflect the signal transmission quality of the entire communication link,and it is sensitive to both amplitude noise and phase noise,and is used more and more.To measure the quality of the communication link.Therefore,the world's major measuring instrument manufacturers have invested considerable scientific research costs in the development of vector analyzers with superior performance.Since the accuracy of the instrument's analog-to-digital converter cannot keep up with the precision development speed of the dedicated analog-to-digital converter chip,the use of the latest advanced instrument for EVM testing is not only expensive,but also for communication equipment that uses high-precision analog-to-digital converters,its accuracy will be lower.In response to the above-mentioned problems,this article aims to develop a set of all-digital measurement schemes for error vector magnitude based on the idea of software radio,which can save costs,shorten the development cycle,and is also easy to expand and update.The main work of this paper is as follows:(1)Analyze the EVM measurement steps of a conventional vector analyzer(such as VSA89600),including various links in the entire wireless communication system such as quadrature modulation,shaping filtering,digital mixing,etc.,and study the basic methods of reference signal generation in the instrument;(2)Study the influence of carrier frequency offset and sampling timing deviation on EVM.Separating loop and closed loop methods,this thesis studied mainstream carrier synchronization and sampling timing synchronization methods,designed a closed loop scheme for EVM testing,and elaborated on the principle of carrier synchronization loop the loop and timing synchronization loop.Besides,the loop tracking process is simulated.At the same time,it analyzed the jitter problem that exists after the loop converged in the closed-loop structure when using the software to implement the EVM testing,and then performed simulation verification and explanation on it.(3)Aiming at the jitter problem of the closed-loop test scheme,an open-loop EVM test scheme based on known data is proposed,the test steps of the scheme are described in detail,and the test performance of the scheme is simulated and analyzed,avoiding the algorithm itself.The loss can truly reflect the performance of the baseband board,retain the original information of the test data,and can be more accurate than the closed-loop structure.(4)The proposed scheme was implemented on the communication baseband board used in a project,and the actual hardware EVM test was carried out.The test results of the two schemes designed in this paper and the instrument test results were compared.It proves that the test results of the scheme in this paper are in good agreement with the test results of the instrument.
Keywords/Search Tags:Vector Signal Analyzer, Error Vector Magnitude, Sampling Timing Synchronization, Carrier Synchronization, Baseband Board Hardware Test
PDF Full Text Request
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