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Research On FPGA-based Smart Solid State Disk

Posted on:2015-12-02Degree:MasterType:Thesis
Country:ChinaCandidate:S LiFull Text:PDF
GTID:2348330509460621Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
In the Big Data era, a large number of data-intensive applications require big volume storage capacity and high storage performance provided by the storage system. As NAND flash technology developing, the research and application of SSD(Solid State Disks) rapidly progress. With the processing capacity of SSD controllers, some computing tasks can be offloaded into the SSD controllers to process, which can parallel the host and storage device computing, decrease the number of I/O and relieve the I/O wall problem.Firstly, based on the deep analysis of the design drawbacks of former intelligent storage devices, this paper arguments that the design of smart flash SSD should face on typical data-intensive applications, adopt the most simple and efficient approach and maintain maximum compatibility with the existing storage system. Based on the above principles,this paper proposes a system architecture of the FPGA-based smart SSD, and design a simple and effective command offload mechanism.Then, we design and implement a prototype of FPGA-based smart SSD, which supports offloading query operations of Database to the smart SSD. Especially, we design implement the FPGA-based pipelined execution module and the smart SSD storage engine,which can recognize and offload selection and projection operations to storage device.Moreover, we design and implement data-centric write mode for the DRAM controller interface and flash synchronization controller in order to increase the smart SSD performance.Finally, on the FPGA-based flash SSD hardware prototype system, we test and analyse the performance of smart SSD system. The experiment results show that the FPGAbased smart SSD framework is effective. The FPGA-based smart SSD improves the performance of database query significantly. The data-centric write mode can double the DRAM access bandwidth,the data transfer rate of the flash synchronous controller becomes 4 times of the asynchronous mode.
Keywords/Search Tags:Flash Memory, Solid State Disk, Smart Storage, FPGA, Database
PDF Full Text Request
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