Research On Mounting Simulation And Design Error Detection Of Printed Circuit Board

In the traditional Surface Mount Technology (SMT) area, manufacture personnel need to repeat the trial-mounting operations to ensure the manufacturability of Printed Circuit Board (PCB). However, along with the enhancement of PCB component complexity and the improvement of circuit integration, the traditional trial-mounting analysis has been far from enough to meet the electronic manufacturing requirements of short-period, low-cost and high-quality. While the simulation of mounting process and the error detection of PCB design with computer can take the place of traditional analysis, which is helpful for improving the analysis quality and shortening the development cycle.In the paper, a new technology of mounting simulation and error detection of PCB is studied and a corresponding system is developed. Firstly, according to the diversification of Electronic Design Automation (EDA) file format, an idea of isomorphic transformation of heterogeneous files is presented and an universal simulation file format is designed. Secondly, after using the simulation files as the input of a simulation model, a three-dimensional (3-D) simulation method based on the 2-D information is presented and the simulation modeling of PCB component with OpenGL is achieved. Thirdly, a common rule checking algorithm is designed and the error detection of PCB design is thus realized. Lastly, based on the animation principle, the 3-D dynamic simulation of SMT and real-time display of checking results are realized by combining of the PCB components modeling and rule checking.The test results shows that through the seamless-connecting with the EDA software tools such as Protel and Mentor, the system developed in this paper can truly simulate the mounting process of PCB and estimate the assembling ability of PCB components, which shortens the development cycle and reduces the producing cost.However, the optimization of components assembly sequence and automatic correction of EDA design data have not been considered yet. So both of them are the research emphases for our future work.