Block Level Verification Of SD Card Based On VMM

As the development of SOC technology and great use of design IP, the size of IC chip is going to be more and more huge, and the work of verification is more and more complex, too. Verification is the key for ensuring the IC useable and getting higher ratio of successfully taping out for the first time. But the development of verification methodology is much slower than it of design.It is hard to simulate all the possible conditions which may happen in the real use of the IC design and foreseen all possible boundary condition and find the bug of design in a deep level. What's more, make the work of verification more automatically, make the verification environment more reusable and build the verification IP is required urgently now.The VMM verification methodology which based on system verilog language provides us a more automatical, reusable, complete and higher efficienty methodology. The prominent advantage of VMM is : automatically generate data based on the constraint; verificate based on function coverage and code coverage; testbentch which have five levels; one testbentch be used by all cases. The use of VMM can obviously improve the efficienty of verification.The project builds the block level verification envrionment for SPI mode SD memory card by VMM verification methodology. First, this paper introduces the standard protocol of SD card in detail, and then the verification plan be made based on the spec, including main functions needed to be tested, and the basic verification environment structure. Then build every verification function modle by extending from basic class which is provided by VMM, define some parameters in the environment to make it enable to be used by all cases.almost. this paper uses RAL(register abstraction layer) to verify the register, such as reading and writing regisgers and use scenario-generator to generate data.The result of this object show us that , usage of VMM verification methodology can make the verification work efficienty much higher than before. What's more, this block level verification environment can be reused in system level and also can be partly reused in some other objects which is similar with SD card. This envrionment can be the reference for further verification work. The standard environment is very useful for engineer to quickly build a verification envrionment. It also can be changed easily for some specific use. But it still need to be improved for better reusability .