Research And Implementation Of Digital Multiplexing Algorithm Based On FPGA

The digital multiplexing algorithm based on the uniform DFT (Discrete Fourier Transform) filter banks is an effective method for multiplexing multicarrier signals. With the development of microelectronic technology and the widespread application of FPGA, the implementation of digital multiplexing algorithm based on FPGA has become one of the greatest concerned problems recently.In this dissertation, two structures of the DFT-based multiplexing algorithm, including the polyphase-filter-based and the weighted-overlap-adding-based structures, are firstly studied. Then, with the weighted-overlap-adding-based structure, the multiplexing of 48 groups of 12-channel multicarrier signals is implemented and debugged on the Xilinx Virtex-4 XC4VSX55 chip. The main contributions are as follows:1. The polyphase-filter-based and the weighted-overlap-adding-based structures of the digital multiplexing algorithm are deeply studied and analyzed. According to the technique requirements, the latter structure is employed in our digital multiplexing algorithm implementation;2. In order to verify the multiplexing algorithm of weighted-overlap-adding-based structure, the float-point programs for the corresponding algorithm are implemented with MATLAB;3. Based on the multiplexing algorithm of the weighted-overlap-adding-based structure, the scheme for the FPGA implementation is firstly proposed. And then, the corresponding source codes with VHDL and the fixed-point programs with MATLAB are programmed. Finally, the function simulation and time simulation results are compared with the simulation results with MATLAB to verify the FPGA programs;4. Using ISERDES and OSERDES modules, the VHDL codes of input interface at 384MHz and output interface at 128MHz are programmed, both of which can transmit data stream stably at DDR mode;5. Finally, the programs are debugged in the hardware platform, and operate stably. The results are correct and meet the requirements.