The Design And Implementation Of Level 2 Node In Widonet Based On FPGA

Now widely used Ethernet exist the shortcomings of complex of an integrated data transmission. In order to fundamentally overcome such shortcomings and have a very good link with the next generation networks (NGN), we hope to design a new network, it enables different business, different data structures, different transmission data rates, different signaling data link that can be transmitted in a network ,it is WIDONet. The basic approach to address these many problems that beset us is to achieve separation of transmission and business.The original WIDONet structure is a single star-shaped network,although the structure is simple, but that structure is not conducive to the expansion and large-scale network construction. This article is increase of level 2 node in the original network structure, also known as tandem node, that makes WIDONet into a tree topology, such a change is conducive to large-scale network construction, while the design of tandem node, the access concentrator to reduce the number of nodes to improve the work efficiency of the concentrator.The paper has a detailed discussion of these two kinds of level 2 node function and design principles.And presents a FPGA-based design and described the program's system design, including hardware circuit design and software system design. On the hardware side, we mainly describes the circuit board schematics and design process, the selection board to discuss the main components of the causes and the main circuit board in the role and design principles, On the software side, we use Altera's Quartus II software for level 2 nodes within each module design, and gives the principle of the structure diagram of each module and simulation waveform.Finally, we test the system and further validate the accuracy and reliability of the design, and discussed the direction of the system improvements.