FPGA Chip Design Of 16QAM Baseband Modem

This paper investigates algorithms and FPGA implementation of the 16QAM baseband modem. Firstly, 16QAM modulation theory and top level module of the modem with some basic principles for FPGA design have been introduced. Then, several efficient implementation methods of high performance filter have been analyzed. The foreend the root raised cosine filter is implemented in polyphase structure and distributed algorithm. The following instroduction is the design of the adaptive blind equalizer module which is a transversal filter based on complex data structure. Time-multiplexed filter architecture and high performace MAC unit utilizing booth encoding reduce resource consuming greatly. Then, the design of carrier recovery module which is a two stage digital phase locked loop has been described. The digital phase locked loop is calculated from the corresponding analog phase locked loop and the tan~-1 function of the DD phase detection algorithm is implementation in CORDIC architecture. Finally, the design of feed forward error correction module based on ALTERA IP Cores has been introduced. The interface of ALTERA Viterbi decoder IP Core is implemented strictly according to ALTERA Atlantic interface specification.