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The Design Of RS Encoder Based On SystemC

Posted on:2006-04-01Degree:MasterType:Thesis
Country:ChinaCandidate:Q LiuFull Text:PDF
GTID:2168360152975507Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
By means of the new SOC design language SystemC and it's flat roof, the idea and design flow of the design based on SystemC are presented, at the same time, a RS encoder was designed by using SystemC in the paper.Firstly, the paper discusses the necessity of using the system language in design by analyzing and the requirement and actual development of designing the IC. So design by using SystemC which is as the hotspot of the SOC design is meaningful.Secondly, the theory and realization of RS encoder is introduced compendiously in the paper, and then the RS (15, 9) encoder is realized by using SystemC. The main process includes following: divide the system into several modules and model them by using SystemC. Then, after the code of each module is assembled to form the code of whole system and the code of testbench is added into the project, the project is compiled and simulated. The rationality and correctness about the design of RS (15, 9) based on SystemC is validated by comparing the result with the result of handwork and the result of simulation. Together, in this part the experience in the process of this project about coding SystemC code is summed up.Lastly, the SystemC code is amended for synthesis and synthesised byusing the SystemC Compiler. Together, the unsynthesizable subset is summarized. Then, FPGA is used to test the function of the project. The result of FPGA test shows that the design fully has accomplished the requirements.
Keywords/Search Tags:SOC, SystemC, RS encoder
PDF Full Text Request
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