Design Of Video Compression IP Core Based On FPGA

At present, the main method for electronic system's designing and manufacture has developed from "Chip & PCB" to "IP & SOC". Preorder module IP core is widely used in the design of System on Chip (SOC), IP core is becoming the kernel component in the designing of future chip.For the increasing demand of multimedia, the video compression technology has been developed dramatically. In sorts of video compression standards, H.263 protocol has a good performance in low rate communication channel.According to the theory in video compression as well as the simulation and verification requirement in IP core designing, the FPGA based IP core simulation platform is developed. The hardware sub-platform uses XC2V3000 of Xilinx as the core chip, designs the periphery circuit according to the requirement of video compression IP core application, the software decoding sub-platform running on host PC. The ModelSim software simulation platform without hardware support is also presented here.Using the FPGA simulation platform, the video compression IP core based on H.263 protocol is proposed. After the simulation and debugging in software platform of ModelSim, as well as the hardware testing, the simulation and verification of video compression TP core are completed.