| With the continuous increase of So C design scale and verification cost, hardware-software co-simulation technology and platform-based verification of So C have become the industry mainstream thoughts. At the same time, with FPGA design developing and perfecting, the study of FPGA-based co-simulation that is effective and authentic is of great significance, especially in terms of improving the overall verification results.This paper constructs a new type of IP-core verification platform based on the co-simulation and uses gigabit Ethernet as the communication medium. Also, the design combines Leon3 So C platform with Xilinx So PC system. The platform is mainly divided into two parts — PC part and FPGA part. As the main body, the verification platform in PC part consists of four processes — Leon3 So C process, TCP server process, verification process and expanding function process. There are two methods in data communication between different processes: the text file and shared memory, and the Event mode is adopted in timing-control signal communication. The FPGA part is mainly divided into the hardwar e logical part which contains the IP-core under test and the So PC software part. The communication between PC and FPGA is implemented by TCP protocol for reliable transmission, PC using Winsock API and So PC software using the lwip library. At the same time, a new data frame based on Ethernet is proposed in this paper because of the convenient of the IP-core verification, which can be used in combination with TCP protocol.There are three tests are presented at the end of the paper: basic functional verification, basic performance test and overall functional verification based on Leon3 So C platform. The results show that the basic function and the overall function of the verification platform of IP-core can run normally, and the platform has greater advantages in terms of validation speed when the IP-core logic is larger(such as complexity of 1024 bits multiplier or above). |
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