Research On Verification And Design Technology Of VDSM IC Manufacturability

As the IC manufacturing process develops from sub-micron to very deep submicron (VDSM) technologies, with current lithography tools (248nm and 193nm), foundries can not manufacture products that designs want because of so-called Optical Proximity Effect(OPE). Before more advanced lithography tool is produced, in order to use current tools to manufacture VDSM IC, reticle correction methods such as perturbing the shape (via Optical Proximity Correction (OPC)) or the phase (via Phase-Shifting Masks (PSM)) of transmitting aperture in the reticle are proposed by the industry. The basic purpose of these correction methods is to manufacture smaller CDs using existing equipments and to preserve functional correspondence between the designed circuit and the manufactured circuit.However, in current design flow, designers do not consider whether designs are friendly to OPC before they are sent to foundries. In fact, a lot of features in such designs can not be corrected enough because of many factors such as the constraints of environments. So even though such designs are corrected, many lithographic errors still exist. So in VDSM semiconductor design and manufacturing, the estimation and verification after OPC are necessary.The paper is for verification and design of manufacturability of OPC and PSM as these two ways have become the most important correction ways. There are two parts in the paper, the first is about the principles of OPC, lithography simulation algorithms, OPC implementation and based on Nanoscope, a verification tool, some verification to corrected designs are implemented. The second is about verification of alternating PSM manufacturability and this part introduces a new method based on standard cells to resolve the phase conflicts, including for dark field and for clear field. The method has the capabilities of verifying standard cell layout, locating features with phase conflicts and giving out suggestion for modification.