Memory Controller Design Of System-on-a-Chip

Memory controller design and IP interconnection are the common issues in System-on-a-Chip(SoC) design.Having analyzed the established IP interconnection strategy and SGRAM characteristics, the author put forward the multi-agent momery interface interconnection strategy,defmed the interface protocol and implemented the momery interface design using finite state machines.High speed memroy controller is essential and important in an embedded SoC. It eliminates the need for agent blocks to have specific knowledge of RAM array behind it. It takes care of protocols and latencies in an effort to simplify memory access by the agent blocks. Agent blocks 'see' a single linear frame buffer, all paging and bank swapping is handled by the and is transparent to the agent blocks.When its performace is determinate,the efficiency of the memory in a system depends on the design of the interface controller.This paper discuss the design of the nice interface controller from interconnection strategy selection,interface protocol establishment and memory timing parameters.SGRAM is one of the successful graphics device with high performance and high speed in the multimedia technology application area recently.FSM resolve the arbitration mechanism and timing matching problems in the SGRAM controller design.