| This dissertation explores six novel compiler techniques for accelerating digital system simulation: temporal analysis, waveform propagation, input desensitization, concurrent evaluation, statement compaction, and embedded scheduling.; In order to gauge the applicability and impact of these optimization techniques, evaluation employs a mainstream modeling language (VHDL) and existing processor networks. Across a wide range of digital system models, these techniques should accelerate simulation by more than an order of magnitude. Acceleration results from the execution of fewer instructions during simulation, an increase in the number of instruction threads available for parallel execution, and greater decoupling between distributed instruction threads. |
