Font Size: a A A

Indium gallium arsenide resistive-gate charge-coupled devices

Posted on:1993-06-30Degree:Ph.DType:Dissertation
University:Columbia UniversityCandidate:Rossi, David VFull Text:PDF
GTID:1478390014495888Subject:Engineering
Abstract/Summary:
InGaAs based charge-coupled devices (CCDs) are investigated with focus on resistive-gate CCDs (RGCCDs) employing an InGaAs channel for both high speed analog signal processing and imaging applications. A buried channel and a two-dimensional electron gas (2DEG) RGCCD structure are demonstrated.;The buried channel device uses InAlAs as a barrier height enhancement layer and is arranged as a four-phase RGCCD, using cermet as the resistive material. Operation between 13 MHz and 1 GHz at room temperature exhibits a 0.98 charge transfer efficiency (CTE). Cooling the device to about 200 K results in an increased CTE of 0.99 at 13 MHz. The primary performance limitation is identified as the mesa sidewall leakage current and several methods of solving this problem are proposed and attempted.;The 2DEG structure is a planar-doped device, also arranged as a four-phase RGCCD with a cermet resistive layer. The planar-doped 2DEG InGaAs RGCCD exhibits greater than 0.999 CTE between 20 MHz and 26 MHz, the upper frequency limit for the low-speed test station. CTE degradation below 20 MHz is attributed to gate leakage current. The relative clock biasing arrangement is shown to be critical for high performance operation, and high performance gigahertz range operation is impeded by present bias limitations.;A semiconductor resistive-gate CCD (SRGCCD) structure is proposed and investigated. In conjunction, an heterojunction internal photoemission CCD is suggested as a direct application of the (SRGCCD). The SRGCCD uses a lattice mismatched InGaAs/AlGaAs heterojunction with mismatched InGaAs acting as a semiconductor resistive gate and GaAs as the channel material. The material and electrical properties of this heterojunction are studied, indicating the ability of the gate to modulate the channel potential and an associated 0.8 eV barrier height. Operation of a SRGCCD indicates poor performance, and an explanation is proposed which suggests an inherent limitation in the SRGCCD device structure and operation. A semiconductor capacitive-gate CCD remains a viable alternative.;A general relationship between the charge capacity of a four-phase resistive-gate CCD structure and the clock voltage swing is derived for the buried channel structure. This relationship is significant for optimum RGCCD device design and layout with respect to speed and dynamic range.
Keywords/Search Tags:Device, RGCCD, Channel, Resistive-gate, Structure, CTE
Related items