Investigation Of Nc-Si QDs Floating-gate Memory And Si-based Resistive Switching Memory

With the increasing integration of memory chip, the feature size of the cell decreases at the same time and lies about 10 nm by the end of 2020. As the thickness of tunneling oxide for traditional floating-gate memory turning into nano-scale, the consequent aggressive scaling of the memory technology is destined to face serious limitations in the next years. However, the nc-Si QDs floating-gate memory, using laterally isolated quantum dots instead of poly-silicon as the floating gate, will solve these problems effectively. On the other hand, the next generation universal memory which is based on the new storage technology is used to replace the Flash memory. Among so many uprising universal memories, the resistance random access memory (RRAM) is a potential candidate. It gets so many advantages compared with conventional charge-storage memory, such as simple M/I/M structure, high density integration, super high speed (ns), much longer endurance (1012) and so on. In this paper, we introduce the nanocrystal silicon (nc-Si) floating gate memory fabricated on the 0.13 um standard CMOS process line and the resistive switching random access memory (RRAM) based on the SiOx thin films.First, we have successfully fabricated the nc-Si floating gate flash memory cell on the 0.13μm standard CMOS process line in SMIC. The cell length and width are 0.176μm and 0.16μm, respectively. The thickness of tunneling oxide is about 3.5 nm. The average size of nc-Si is about 12 nm with the density of 2×1011 cm-2. The cell gets an "OFF" current as low as 200 fA and the subthreshold swing is about 0.14V/decade. After programmed and erased by ±7 V/10 us pulse, respectively, the cell can get a memory window of about IV, which is large enough for a typical sense amplifier to detect. And the window is more than 1.3 V if operated by ±7 V/1 ms pulse. Besides, the cell shows a very good immunity to the disturbance of low bias and good data retention characteristics. More importantly, the pulsed endurance testing demonstrates performance up to 107 P/E cycles, which is much higher than the traditional flash memory cell (104). Generally, our nc-Si floating gate memory exhibits very wonderful characteristics such as low operating voltage, low power consuming, high speed, long endurance and so on, which has already been used in our upcoming 8k bits nc-Si flash memory chip with NOR structure.Then, we designed and fabricated 8k bits nc-Si flash memory chip with NOR structure based on the excellent memory cell by cooperation with SMIC & SIMIT. The NOR structure composed of 128 word line and 64 bit line is helpful to achieve single bit operation. Considering the disturbance in the 8k bits cell and the current of sense amplifier, we designed the optimal voltage for the memory chip.In the other part of this paper, the SiOx films (x=1.3) were deposited on the silicon substrates by electron beam evaporation. The resistive switching behaviors from the device consisted of indium tin oxide (ITO)/SiOx/Si/Al with annealed SiOx layer as the resistive layer were investigated. It is found that on/off ratio of the device increases with annealing temperature and with the decrease of electrode size. The maximum of on/off ratio reaches 109. The analysis of X-ray photoelectron spectroscopy and electron paramagnetic resonance spectrum reveals that the silicon dangling bonds in different valence states can be formed at different annealing temperature, which is the main source of the conducting filament pathway. The resistance of SiOx film is equal to that of the bulk for high resistance state (HRS). The result of ellipsometer indicates that the enhancement of refractive index for annealed SiOx films iinduces the increase of resistance for HRS.