Physics and technology of lateral power devices in ultra-thin silicon-on-insulator

Power integrated circuit (PIC), or smart power, technology has attracted much attention in recent years. By integrating both high voltage power devices and low voltage control logic devices in the same chip, improved functionality, reduced cost and better reliability will result. Silicon-on-insulator (SOI) materials, which provide superior dielectric isolation among devices, allow easier implementation of this smart power technology. High breakdown voltages can be achieved in devices built in SOI substrates as a result of the high breakdown field of the buried silicon dioxide layer. Simplification of fabrication process and fast switching speed can be obtained if an SOI layer of less than a micron thick is used.; A wafer bonding and etch-back process has been developed to prepare SOI substrates with thick buried oxide layers for high voltage PICs. A heavily doped boron layer was used as an etch-stop during the thinning process to ensure good thickness uniformity of the final SOI layer. A fifteen-mask process has also been developed to fabricate both power devices and low voltage CMOS devices.; By employing a linearly graded dopant profile in the drift region, we have demonstrated high breakdown voltages in lateral double-diffused MOS transistors (LDMOSs) and lateral insulated gate bipolar transistors (LIGBTs). Low on-state voltage drops and fast switching speeds were also shown in LIGBTs. Effects of varying SOI and buried oxide thicknesses on device characteristics have been investigated. An intermediate SOI thickness of 0.5 micron, in combination with a thick buried oxide, was found to be a reasonable compromise for the device forward conducting and blocking characteristics.; One concern of using SOI substrate is the low thermal conductivity of silicon dioxide, which will impede heat dissipation inside the device and affect device reliability. This problem of self-heating has been investigated through experiments and two-dimensional electro-thermal simulations. Device thermal resistances and temperature profiles have been studied. Simulation results using new buried insulators such as aluminum nitride and diamond showed a large reduction in temperature rise when compared to silicon dioxide.