On-chip signal processing for CMOS active pixel image sensors

Desirable performance of low cost, low power and low physical volume and mass for complete camera systems relies on on-chip integration of signal processing circuits. One part of this dissertation focuses on the development of low power, high speed analog-to-digital converters (ADC) for on-chip video signal processing in CMOS digital-camera-on-a-chip systems. The second part of the dissertation is a demonstration of CMOS active pixel image sensors (APS) with customized functionality through on-chip integration of analog signal processing circuits.; On-chip integration of column-parallel successive-approximation ADCs was demonstrated for the first time with good accuracy and ultra-low power consumption. Two charge-scaling ADCs achieved 8-bit resolution at up to 50 ksamples/s conversion rate and less than 150 {dollar}mu{dollar}W power consumption, one of them operates up to 833 ksamples/s with 5-bit resolution. A switched-capacitor ADC using a single inverter amplifier and most compact cell design demonstrated 7-bit resolution at up to 55 ksamples/s. The first APS sensor with column-parallel successive-approximation ADCs demonstrated 8-bit resolution images up to 4 Mpixels/s, the highest readout rate so far with column-parallel ADCs. Digital imaging devices for commercial video applications and high speed industrial applications can be developed based on these ADC designs.; Two integrating CMOS sensors with pixel binning and one of them, frame transfer capability were demonstrated for the first time. A 32 x 32 element sensor with single-ended column circuits achieved 50 dB dynamic range, 1.58 mW power consumption at 400 Hz frame rate and 1.5% fixed-pattern-noise (FPN) with 1V full signal swing. A 128 x 128 element integration sensor with fully differential column integrator circuits achieved 72 dB dynamic range, 24 mW power consumption at 125 Hz frame rate and 0.5% FPN with 1.2 V full signal swing. The integration APS sensors have applications in time delay integration (TDI) imaging and light level adaptive imaging. Successful integration of these column circuits paved a road for on-chip integration of other analog circuits based on column-parallel operational amplifiers and integrators.; Work presented in this dissertation demonstrated the column-parallel implementation as a feasible approach for on-chip signal processing with low power consumption and good performance.