| The image information is crucial to the human understanding of the world. From ancient times until now, humans have recorded the good things in a variety of ways. With the development of technology, all kinds of equipment for recording images have come into use, from early film cameras to digital cameras now, which all changed our lifestyle. In recent years, with the continuous improvement of CMOS technology, the CMOS image sensors become more and more popular. The appearance of Moore’s Law forecasted the trends of development in contemporary integrated circuits accurately. With the continuous improvement of the integration of semiconductor devices, people integrated the ADC onto image sensor, so that it is convenient to image processing and saves chip resources. The ADC of great performance contribute to restore image information recorded by the image sensor better. Therefore, the design and research on ADC in CMOS image sensor is of great significance.The thesis is based on 0.18 μm CMOS(Complementary Metal Oxide Semiconductor) process, using the Cadence designed a new 4T with dynamic range enhancement(Transistor) pixel readout circuit, analog-to-digital converter was integrated in pixel with dynamic range enhancement and low power consumption. Dynamic range enhancement is repeated by the full exposure sampling technology to achieve. In particular based on the intensity of the incident light to generate local charge accumulation through multiple switching TG(Transfer Gate) gate, so then achieved high bits digital analog conversion, and then by the subsequent 8bit analog-to-digital converter converting low bits. Circuit does not require the data read out by turning off the bias circuit to save power. The system uses a 1.8 V power supply, the ADC achieved a 7.81 bit resolution, Total accuracy achieved a 14.2 bit resolution, dynamic range reached up to 85.48 d B, consumes only 64 n W/pixel, dynamic range enhanced for 6.4 bit while the power consumption required only increased 2.5%. |
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