| To continue reducing the minimum feature size in microchips as Moore predicted, the semiconductor industry has been investigating a number of advanced lithography techniques, i.e., 193-nm optical lithography, immersion lithography, Extreme Ultraviolet Lithography (EUVL), and Electron-beam Projection Lithography (EPL). These technologies will be required to satisfy the stringent error budgets for the sub-90-nm regime. One of the major sources of error is the thermomechanical distortion of the device wafer during exposure. The focus of this research was to identify the principal factors which affect the response of the wafer, and numerically predict the temperature rise and corresponding thermal in-plane distortions. This was accomplished with three-dimensional finite element (FE) models which were developed for this research. The FE models used for this research were also verified with simple thermal and structural analytical solutions.; The research first focused on device wafer heating for 193-nm lithography, which is being refined to extend the use of contemporary optical systems. Convection to the surrounding air as well as radiation heat loss were considered. Also, immersion lithography has been proposed as a potential extension of optical lithography without significant changes to the current industrial infrastructure to meet future node requirements. The most important difference between immersion and traditional optical lithography is the insertion of a high refractive index liquid in the space between the lens and wafer instead of air. Convection to the surrounding air was assessed at the top surface of the wafer except for the part under the liquid. Since EUV and EPL lithography systems use vacuum chambers for exposure, only radiation effects were implemented in the simulations for these technologies.; Thermal and structural contact conditions are quite important to control device wafer heating and distortion. These effects were assessed by parametrically varying contact conductance and friction between the wafer and chuck. The simulation results facilitate system design for these technologies in a cost-effective and timely manner. |
