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Multi-chip global free-space optical interconnections: Scaling, embedding, design, and implementation

Posted on:2002-12-01Degree:Ph.DType:Dissertation
University:George Mason UniversityCandidate:Christensen, Marc PeterFull Text:PDF
GTID:1468390011490529Subject:Engineering
Abstract/Summary:
A new free-space optical interconnection concept, based on 2-D arrays of vertical cavity surface emitting laser (VCSELs) and photodetectors integrated with CMOS integrated circuits, is developed. To motivate the architecture, a general class of macro-optical and micro-optical global free-space interconnection approaches is examined in terms of the bisection bandwidth of the interconnection fabric. The 3-D optical approaches are compared with each other and with those achievable within the conventional electrical packaging hierarchy (chip/multi-chip module/printed circuit board). The analysis shows that global macro-optical interconnection modules have several orders of magnitude benefit in power-volume product over global micro-optical and electrical interconnections for problems that have a bisection bandwidth of several Terabits/sec.; A general interconnection fabric, dubbed the “Two-bounce” architecture, is developed. It leverages the powerful scaling of macro-optical based interconnections, yet has the required space-variance to achieve arbitrary permutation interconnectivity. The approach is based on topological transformations of 3-D free-space optical modules. The architecture is derived from the Benes network. These transformations leverage the higher order shuffle interconnections achievable with global macro-optical interconnection approaches. The combination of global optical interconnections with local electronic switching elements in the Two-bounce implementation of the Benes network provide the minimum number of 2 x 2 switches (for rearrangeably nonblocking performance) and the minimum number of required global optical passes (2) through the module.; The basic global interconnection architecture is experimentally verified in a multi-lens reflective prototype that uses a fiber coupled base-plate to emulate smart pixel I/O placement. Registration in such optical interconnection modules is one of the most important factors and is often the most difficult to achieve due to its stringent requirement on distortion. A novel beam-steering concept is introduced which completely removes distortion from the multi-chip architecture in both on-axis and off-axis configurations and simplifies the design and packaging of multi-chip global optical interconnection modules. The hybrid concept is analyzed and validated through a series of experiments.; The results of this dissertation provide analytical and experimental validation of key elements of a new class of scalable optical interconnection fabrics that fully exploit emerging VCSEL-based smart pixel technology for future switching and parallel computing applications.
Keywords/Search Tags:Interconnection, Optical, Global, Multi-chip
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