| A method is presented for interfacing signals between two independent clock domains using an asynchronous FIFO (first-in first-out) memory. The method has low latency, does not limit throughput, and does not require any control of the timing of the two local clock domains by the interface. The interfacing method is applied to globally-asynchronous locally-asynchronous (GALS) integrated circuit design to demonstrate its performance potential. Specifically, a single-chip shared-memory multiprocessor with each processor in its own local clock domain is examined. The integrated circuit area dedicated to the interfaces is found to be small in comparison to total area. The performance of the GALS multiprocessor is compared against a hypothetical globally-clocked multiprocessor with the same number of processors. Two applications of potential commercial interest are used for the comparison: the Smith-Waterman alignment algorithm used in bioinformatics and the Advanced Encryption Standard. The performance of the GALS multiprocessor is negligibly lower than the globally-clocked processor for these two applications. However, the design effort needed to implement the GALS multiprocessors is much less. To show that there are applications that are not well suited to this GALS multiprocessor, the performance of the GALS multiprocessor and the globally-clocked multiprocessor are compared for a simple string search algorithm. The GALS multiprocessor does considerably worse than the globally-clocked processor on this application due to the high ratio of memory access to computation. |
