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Vertically-integrated CMOS technology for third-generation image sensors

Posted on:2012-01-18Degree:Ph.DType:Dissertation
University:University of Alberta (Canada)Candidate:Skorka, OritFull Text:PDF
GTID:1468390011460335Subject:Engineering
Abstract/Summary:
Over the past four decades, CCDs and CMOS active-pixel sensors have defined the first and second generations of electronic image sensors, respectively. They are the core components of digital still and video cameras. However, despite significant progress, visible-band digital cameras do not rival the human eye entirely. For example, most CCD and CMOS image sensors suffer from low image quality in dim scenes and low dynamic range relative to human perception. To realize a third-generation of image sensors with superior capabilities, vertical integration is a promising approach. A process flow to support research of this nature in Canada was developed with CMC Microsystems. Using the flow, a vertically-integrated (VI) CMOS image sensor with competitive dark limit and dynamic range was presented. Silicon CMOS dies and hydrogenated amorphous-silicon photodetector dies are first designed and fabricated separately, and are then assembled with solder bumps by flip-chip bonding. The CMOS circuits include an electronic feedback that maintains a constant potential across each photodetector, which means the light-sensitive film need not be patterned. Methods to ensure stability of the feedback loop are presented. Using semiconductor physics for a simplified photodetector structure, a mathematical model that employs intuitive boundary conditions is proposed. Analytical and numerical solutions are used to explain and calculate the optimal thickness of the light-sensitive film. In this fashion, efforts to establish a third generation of image sensors through VI-CMOS technology are advanced.
Keywords/Search Tags:CMOS, Image, Sensors
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