| The interest for sigma-delta modulators based on switched-capacitor (SC) circuit has significantly increased in recent years. A sigma-delta modulator provides a robust means of implementing a high-resolution converter architecture in scaled complementary metallic oxide semiconductor (CMOS) processing and very large scale integration technology, which is more suitable for implementing fast digital circuits than accurate analog circuits.; This dissertation proposes a new body-effect compensated switch configuration for low voltage, low distortion SC applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has a better total harmonic distortion than the conventional bootstrapped circuit by 19 dB.; A 2-1 cascaded sigma-delta modulator is suggested to provide a means for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. The design of the transfer functions, system and circuits needed to realize a 2-1 cascaded sigma-delta modulator are explored. Non-idealities for circuit implementation are investigated.; An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented in a 0.5 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with 16 pF of load capacitance. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The sigma-delta modulator does perform some noise-shaping, and does so at the correct frequencies. The measurement of digital bit-stream analysis is currently under test. The die size is 1.9 x 1.5 mm2. |
