Deterministic built-in self test for digital circuits

In built-in self-test (BIST), on-chip circuitry is added to generate test vectors or analyze output responses or both. BIST is usually performed using pseudorandom pattern generators (PRPGs). The main disadvantages of pseudorandom BIST are: (1) Testing a circuit with constraints on some signals may cause an illegal combination of values on those signals when pseudorandom patterns are used. (2) Plain pseudorandom patterns may not achieve thorough testing with a reasonable test length. Enhancement techniques are used to improve the thoroughness of pseudorandom testing. In this dissertation, a set of novel techniques are presented to address and solve the problems of pseudorandom BIST.; Many digital circuits have constraints on what combination of values can occur on a set of signal lines. Using pseudorandom BIST for such circuits may cause the circuit to be damaged or the test results to be corrupted. This dissertation presents techniques for detecting the illegal combinations of signal values and preventing them from occurring or from corrupting the test results.; BIST reseeding is used to improve fault coverage by reinitializing the PRPG to generate deterministic test patterns that target specific faults. Most of the previous work done on reseeding is based on storing the seeds in the ATE. This dissertation presents a technique for built-in reseeding. The technique requires no storage for the seeds because the seeds are encoded in circuitry on the product chip.; In reseeding, the test storage or hardware overhead are proportional to the number of seeds. This dissertation presents an algorithm for ordering the seeds in order to reduce the number of seeds needed to produce a set of deterministic test patterns. When compared to arbitrary ordering, the technique reduces seed storage by up to 80%. The dissertation also presents a technique for encoding a given seed by the number of clock cycles that the generator needs to run to reach it. This encoding requires substantially fewer bits than the bits of the seed itself. When compared with conventional reseeding, the technique reduces seed storage by up to 85%.