Design of analog receive filters for 1000BASE-T Gigabit Ethernet

A continuous-time low-pass filter with high-frequency boost is proposed, specified and implemented for 1000BASE-T Gigabit Ethernet analog front ends (AFEs). Different analog filter functions and front-end architectures are explored at the system level. These architectures are optimized to increase the overall performance, thereby enabling a simplification of the overall receiver by backing off on the complexity until the specifications are just met (with a reasonable safety margin). System-level simulation results show that the continuous-time high-frequency boost filter provides the best tradeoff between the overall receiver performance and complexity. Furthermore, the topology of this proposed high-frequency boost filter is optimized to reduce power and area. The acceptable nonidealities, which are expected in an analog implementation, are specified for the circuit design by using behavioral simulations. The proposed filter is implemented by a Gm-C filter in a 0.25 mum digital CMOS process. In the circuit design, a new linearization circuit is used in the gm cells to meet the linearity requirement, and the circuits are designed to work with a low power-supply voltage. Measurement results show that filter responses can be programmable for cable lengths from 10 m to 150 m. Total harmonic distortion is -47.5 dB with a 1 Vpp input at 13.42 MHz and the dynamic range is 51 dB. The total power dissipation is 25 mW from 2.5 V, and the active area is 0.5 mm 2. Results of post layout simulations indicate that it is feasible to implement the proposed analog filter to reduce the overall receiver power and area without sacrificing performance.