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Analysis and characterization of single-event effects on analog integrated circuits in silicon-on-insulator CMOS technology

Posted on:2006-03-06Degree:Ph.DType:Dissertation
University:State University of New York at Stony BrookCandidate:Zhao, BingFull Text:PDF
GTID:1458390005495553Subject:Engineering
Abstract/Summary:
Analog-to-digital converters (ADCs) are extensively used in various applications where signals from the analog world are processed with digital processing electronics (e.g., communications, instrumentation, and consumer electronics). Oversampling delta-sigma data converters trade in resolution in time with resolution in amplitude; therefore, they are capable of achieving high accuracy by employing rather imprecise analog devices. Continuous-time delta-sigma ADCs are preferred to their discrete-time counterparts due to the fact that they can achieve higher speed at a reduced power consumption. Silicon-on-insulator (SOI) CMOS technology is one of the options for the future, based on the anticipated economic benefit brought by its lower power dissipation, lower supply voltage, reduced stray capacitances, and therefore, higher bandwidth. SOI CMOS technology is also suitable for radiation-hardened applications due to the trench oxide isolation between individual transistors and between the active devices and the bulk substrate. Among all radiation effects, single-event effects (SEES) are the most difficult to analyze and characterize, especially in the case of analog circuits where there is no standardized methodology to address this issue.; System level design and analysis of non-idealities in continuous-time delta-sigma modulators are studied in this dissertation. The main analog building blocks for continuous-time delta-sigma modulators are designed in SOI CMOS technology, including operational transconductance amplifiers (OTAs) and comparators. Two highly linear resistor-based OTAs are presented. Single-event effects on OTAs, the digital-to-analog converters (DACs), and OTA-DAC structures are analyzed and circuit design solutions for mitigating SEES in OTA-DAC structures are proposed. A theoretical analysis of single event induced transients in SOI CMOS comparators is presented and confirmed by transistor-level simulation. The proposed approach can predict the behavior of SEES at the output of the comparator. Single-event effect behavioral models for the basic analog cells in continuous-time delta-sigma modulator are developed and verified by transistor-level simulation. These models are included in a complete delta-sigma ADC system. Simulation results are presented and final conclusions are provided.
Keywords/Search Tags:CMOS technology, Analog, Single-event effects, Delta-sigma
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