| Through silicon via (TSV) based three-dimensional integrated circuits have rapidly progressed over the past decade. TSV based three-dimensional integration has the potential to significantly boost the performance and capabilities of state-of-art integrated circuits, while supporting the integration of disparate heterogeneous technologies. The research presented here provides insight into some of the most pressing issues currently being addressed by the research community, and provides guidelines for designing these evolving heterogeneous 3-D systems. The organization of the dissertation begins with an introduction to TSV electrical models, power delivery, and thermal behavior in 3-D ICs. Characterization and physical design methodologies for 3-D integrated circuits are discussed. Electrical modeling of TSVs is presented, culminating in the development of closed-form expressions for the TSV resistance, capacitance, and inductance. Synchronization and power delivery are critical design considerations in 3-D ICs. Models of three distinct clock distribution networks are provided, and a comparison of the power and delay of each topology is presented. Three power delivery topologies are discussed, with experimental evidence describing the effects of the TSV density on the noise profile of 3-D power delivery networks. A comparison of the peak and average noise for each topology with and without board level decoupling capacitors is provided, and suggestions for enhancing the design of 3-D power delivery networks are offered. Thermal properties in 3-D integrated circuits are also discussed. The placement of two highly active and aligned circuit blocks has a significant effect on the thermal profile of 3-D ICs. A test circuit exploring thermal coupling between device planes is presented. The experimental results provide insight into heat flow within 3-D ICs. Three-dimensional integration is an evolving technology that will prolong the semiconductor roadmap for several generations. This dissertation provides insight into the 3-D IC design process, with the goal of strengthening the design capabilities for 3-D integrated circuits and systems. |
