| Reconfigurable Computers (RCs), built from configurable logic processors, such as Field Programmable Gate Arrays (FPGAs), can offer high performance in implementing a wide range of applications. However, there exist multiple challenges that must be resolved in order to develop efficient solutions for reconfigurable computing systems. One of the challenges is that some large circuits require more hardware resources than what is available, and the design cannot fit in a single FPGA chip. One solution to this problem is run-time reconfiguration (RTR). On the other hand, the problem of the reconfiguration time overhead has always been a concern in RTR. As configuration time could be significant, eliminating, reducing, or hiding this overhead becomes very critical for reconfigurable systems.;In this work, a virtual-memory-like technique, called Virtual Configuration Management (VCM), has been proposed. The proposed technique extends cache and memory management techniques to reconfigurable platforms and augmented them with data mining concepts using association rule mining (ARM). Processing locality characteristics are used to discover at run time the workload processing needs and reconfigure the hardware accordingly. These principles have the potential for solving the problem of limited hardware resources through Run-Time Reconfiguration (RTR). In addition, the reconfiguration time overhead may be also hidden if locality of processing is well exploited.;In order to exploit processing locality, both spatial and temporal simultaneously, the proposed technique groups hardware functions into hardware configuration blocks of fixed size (pages), variable size (segments), or hybrid approach (paged segments) where each segment is composed of one or more fixed size pages. Multiple blocks can be configured on a chip simultaneously. Standard, replacement algorithms as those found in caching were considered. By grouping only related functions that are typically requested together, processing spatial locality can be exploited. Temporal locality is exploited through page replacement techniques. To avoid excessive delays and starvation, VCM uses a dual-track execution paradigm, which allows functions to be performed using either the microprocessor or the reconfigurable hardware. New placement algorithms for FPGAs that can provide a tradeoff between placement quality and speed have been proposed.;Simulation and emulation, using the Cray-XD1 reconfigurable computer, were used for the experimental study. The results have shown that the virtual configuration model can provide several folds of speed over previous techniques. |
