Structural Design And Characterisitcs Study Of SOI LDMOS Based On Electric Field Modulation

In recent years,with the development of power electronics technology,the concept of Smart Power Integrated Circuits(SPIC)has been proposed and widely concerned.This technology can reduce manufacturing costs on the one hand and enhance the equipment reliability on the other hand.The superior advantage is that the high-voltage power device and low-voltage control circuits can be integrated simultaneoursly on the same chip.Therefore,Lateral double-diffused MOS(LDMOS)devices with high input impedance and high conversion speed occupy an important position in the field of power device application.Moreover,as the electrodes of LDMOS are located on the surface of the device,it is easier to be compatible with integrated circuit technology.In device design,breakdown voltage and on-resistance are two important indicators to characterize the performance of LDMOS power devices.However,there is a contradictory relationship between the two,so how to improve the reverse breakdown voltage and reduce the specific on-resistance of LDMOS devices without affecting the reliability of the devices has become a hot topic in the field of research.Moreover,considering the harsh environment for the device application,the influence of high temperature and irradiation on the device have become the factors to be taken into account in the research of LDMOS devices.This topic is based on the lateral superjunction LDMOS device.In order to obtain better tradeoff between the breakdown voltage and conduction resistance of LDMOS,for the lateral super junction device is susceptible to the influence of the substrate assisted depleted effect.therefore,under the guidance of the electric field modulation theory,such as reduce the surface electric field,the field plate,lateral variable thickness technology,several high breakdown voltage and low on resistance new device structures have been proposed and discussed in detail.In addition,corresponding research have been carried out on the reliability of the devices such as self-heating effect and single event effect.The main contents obtained in this paper through theoretical research and simulation results analysis can be summarized as follows:(1)For traditional superjunction SOI LDMOS devices,the drift region adopts superjunction structure as the voltage sustaining layer.Under the action of charge compensation in the P pillars,it is conducive to the complete depletion of the N pillars and the high breakdown voltage can be obtained and the on resistance can be reduced at the same time.However,due to the depletion effect of the vertical substrate,the charge imbalance may occur in the superjunction layer,which will affect the performance of the device.To solve this problem,the SOI SFP-LDMOS device is proposed,in which the sidewall field plate structure can be used to replace the P pillars in superjunction region.The characteristic of the structure is that the side wall field plate structure formed by side oxygen combined with polysilicon field plate replaces the P pillars of superjunction structure.The MIS structure can not only compensate the depletion of N drift region,but also introduce a new electric field peak at the boundary of polysilicon field plate.The electric field distribution on the surface of the device is modulated and the breakdown voltage is increased.At the same time,the trigger mechanism of single particle burning effect(SEB)on the device under the condition of single particle irradiation was studied.Compared with ordinary SOI SJ LDMOS,SOI SFP-LDMOS device has stronger capability to resist single event burnout.(2)In order to improve the breakdown voltage of buried superjunction LDMOS devices,the SOI PT-BSJ LDMOS device structure is proposed by combining with the graphic buried oxide structure.The structure features that a P trench region is formed on one side near the source area and a stepped buried oxygen layer is obtained below the drift region.The P trench region compensates to deplete the adjacent N drift region,which enhances 3D RESURF effect,thus further increasing the doping concentration in the drift region,and reducing the on resistance.At the same time,the stepped buried oxide structure will introduce a new electric field peak at its step corner,which can increase the amplitude of the low valley electric field on the surface of the drift region by electric filed modulation effects,makes the electric field distribution more uniform,and then increases the breakdown voltage of the device.(3)In view of the feature that SOI LDMOS device gradually increases in the direction of drift region from source end to drain end under the condition of reverse bias,SOI LDMOS device adopts the VLW structure with N drift region width linearly increased and alternating distribution with high-k dielectric material to self-adaptively bear drain bias voltage.The on-state characteristics of the device are studied in detail because it adopts a wedge-shaped drift region which is different from the conventional structure.The on-resistance analytical formula is derived theoretically and the simulation results show that the formulas can accurately predict the performance of the device.In addition,in view of the self-heating effect of SOI devices under on-state condition,it can be verified that the influence of self-heating effect on devices can be effectively alleviated by replacing the SOI buried oxide with silicon carbide(SiC)material by non-isothermal simulations.In addition,the influence of temperature variation on the device characteristics is simulated by isothermal simulation and the temperature reliability of the power device is characterized by comparing the electrothermal effect responses of different substrate devices.