Research On The Design And Radiation Effect Of High Voltage SOI LDMOS Device

High-voltage integrated circuit(HVIC)aims to realize high and low voltage signal conversion and integration,such as gate drive IC and power management IC,which are widely used in radiation fields such as space and strategic weapons.As the core device of HVIC,lateral double-diffused metal oxide semiconductor(LDMOS)requires a long drift region with light concentration to withstand high voltage,resulting in a large area of thick thermal oxide layer.As a result,LDMOS devices will face more complex and serious radiation effects in the radiation environment.In addition,for SOI LDMOS devices,due to the existence of buried oxide layer,the substrate leakage of the device can be improved,but the total dose degradation of the device will be exacerbated.Therefore,for the application of high-voltage radiation-hardened driving circuits,the design of double-layer floating field plate thick-layer SOI LDMOS devices and their radiation effects are studied in the thesis.The main work contents are as follows:Firstly,the optimization of double-layer floating field plate thick-layer SOI LDMOS device is carried out by using TCAD simulation software.The double-layer floating field plate technology is used to optimize the surface electric field to obtain a more uniform electric field distribution and improve the breakdown voltage of the device.The thickness,resistivity of N-drift region and P-top implant dose are optimized to further improve the breakdown voltage of the device.The breakdown voltage of the optimized device exceeds700 V and the threshold voltage is around 3 V.Secondly,the radiation effect of double-layer floating field plate thick-layer SOI LDMOS device is studied.The multi-interface radiation damage mechanism of the device is revealed.The thick top layer silicon structure is used to reduce the effect of trapped charges in the buried oxide layer,and the P-top shielding layer technology is used to reduce the field oxide layer.The inverse modulation field reinforcement technology is proposed to avoid the monotonous reduction of breakdown voltage and improve the resistance of the device to total-ionizing-dose radiation.At the same time,a heavily doped region that is short-circuited with the source metal is introduced in the P-top layer,which increases the hole extraction path,avoids the opening of parasitic triode,and improves the single-event effect of the device.Finally,the high-voltage radiation-resistant integration technology was developed,tape out and radiation experiments were carried out,and a double-layer floating field plate thick-layer SOI LDMOS device was developed,which realized the high-voltage and low-voltage monolithic integration.The normal test result is that the breakdown voltage is basically higher than 700 V,and the threshold voltage is about 3.1 V of the device.Radiation experiment results:when breakdown voltage is 700 V,the resistance of the device to total-ionizing-dose radiation is>150 krad(Si);When the drain voltage is 400 V,the LET of single event burnout is>75 Me V·cm~2/mg.