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Research On Random Defect Yield Predicting Technique For Integrated Circuits

Posted on:2014-06-25Degree:DoctorType:Dissertation
Country:ChinaCandidate:J J ZhuFull Text:PDF
GTID:1268330425996875Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Since the IC industry has entered the nano-technology era, the yield loss caused by random defect has become a critical issue. Higher production cost and shorter time-to-market call for an accurate and efficient yield prediction before the design gets manufactured.Focusing on the random defect yield prediction technology, we have improved the accuracy and efficiency of yield prediction via the following works:1. Considering the scratches introduced by CMP (Chemical Mechanical Planarization) process, a linear defect model is introduced. Compared with the linear defect model, the circular model obtains two times larger critical area values for sample layouts. By separately modeling linear defect and particle defect and calculating the yield loss caused by them, the accuracy of yield prediction is improved.2. Proposed a new mathematical model of critical area for Manhattan layout. Through strict mathematical analysis, we proved that the critical area of a Manhattan layout is a piecewise quadratic polynomial function of defect size and illustrated how to obtain the coefficients and demarcation points.3. Combining the mathematical model developed in2, the traditional shape shifting method is improved. By appropriately selecting the defect size and extracting critical area, a continuous critical area function for all defect sizes is obtained. The improved method avoids unnecessary critical area extraction and eliminates the integration error of traditional shape shifting method. Experiments on industrial layouts show that the improved shape shifting method can improve the accuracy of the average critical area calculation by24.24%or reduce about59.7%computational expense compared with traditional method.4. Proposed a dynamic extraction method for local critical area. In design-for-yield flow, critical area is optimized through standard cell replacement or metal wire modification, which causes a lot of re-extraction of critical area. By optimizing the re-extraction area and removing the area dependency, the dynamic extraction method greatly reduces the computational cost and improves the efficiency and feasibility of design-for-yield flow.
Keywords/Search Tags:Yield Prediction, Random Defect Limited Yield, Critical Area, DefectModel, Design For Manufacturing, Design For Yield, Voronoi Diagram, ShapeShifting Method
PDF Full Text Request
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