Time-interleaved High-speed Sampling Technology Research

With the development of information technology, the study of information diffusing and processing has become more active. In the recent years, the applications of thetechnology of Software Defined Radio (SDR) become wide in the world. ADC (Analog-to-Digital Convertor) which converts the analog signal into digital signal is the key part of the SDR systems. According to the bandpass sampling rule, bandwidth of the analog signal depends on the sampling rate of the ADC. Thus high sampling rate ADC is very important to enhance the system performance. At present, several famous companies such as AD Corp ,Maxim Corp, Atmel Corp etc present their excellent manufacture. However, the price of ADC with 1GHz sampling rate is very expensive and the digit of the ADC is less than 10 bits usually. In the SDR systems, the accurate converted result is on request for the digital signal processor. Thus it is important to research method which using existing high digit ADC to compose high sampling rate ADC system.There are two common method of improving sampling rate, one is Time-stretched AD conversion (TSADC) method, and the other is time interleaved sampling method. Compared with these two methods, the second one is more realistic. At the same time, the channel mismatch, offset error, gain error and the clock skew mismatch are introduced in the system while the sampling rate is improved. As the result, the signal noise ratio is reduced sharply. So it is necessary to estimate and compensate the affect of the channel mismatch, offset error, gain error and the clock skew mismatch.In this paper, time interleaved sampling method and error estimate and compensate are discussed mainly such as following parts present.(1) A kind of pre-scaled arithmetic to estimate gain mismatch and time mismatch is presented in this paper. The digital post processing algorithms of the channel mismatches includes the estimation and compensation of offset mismatch, gain mismatch and time mismatch. In this paper, a method based on fast Fourier transform (FFT) to estimate gain mismatch and time mismatch is presented. Matlab simulation results are used to prove the validity and feasibility of the algorithm.(2) Four-channel time-interleaved analog-to-digital conversion system which sampling rate is 800MHz is introduced in this paper. In this case, four pieces of AD9430 and other components are chose to design the system. Cadstar is used to design the schematic and the printed circuit board (PCB), and VHDL is used in the ISE to design the software.(3) Use the designed system to sample the sine wave analog signals whose frequencies are 10 MHz and 190 MHz. The stored data is sent to computer through the series port and processed by matlab. offset error is estimated by using the method refer to the 5th reference. And using a new method which is present in this paper estimates the gain error and the clock skew error.. Finally, the convert results are compensated by using the estimation results. The validity and feasibility of the algorithms are proved by the results.