Transceiver Chip Design For Wireless Sensor Networks

The powerful sensing ability and flexible self-organized network of wirelesssensor network (WSN) have attracted more and more attentions.But the powerconsumption,cost and volume are still the main problems for its large scaleapplication.Employing the design methods and manufacturing technologies of theintegrated circuits,the research focus of this dissertation is on the wireless transceiverwhich is one of the most power consuming blocks of the sensor node.Firstly,based on the relationship between the network level power and the nodedensity,from the perspective of the Shannon theory,the energy efficiency of thewireless transceiver and its three main factors are analyzed:the signal to noise ratiofor demodulation,the noise figure of the receiver and the energy expended on thetransmitter.For a specified protocol,it is found that the power consumed on the unitcommunication distance,named network energy density,is more significant for thelife period of a wireless sensor network.Optimizing on the network energy densityprovides a guideline for the power distribution between the transmitter and receiver.Secondly,a system level research on the WSN transceiver satisfying with IEEE802.15.4 is presented.According to the analyses on the signal feature of the base-bandsignal and the frequency demand,the direct transmitter and receiver architectures arechosen for low lost and low power consumption.The link analysis,specification ofeach circuit blocks and the verifications on the overall system guarantee thesucceeded circuit design.The feedback-filtering technique is used to remove the DCoffset,which effectively utilizes the zero DC energy feature of the base-band signal.The research on the parasitic vertical NPN (V-NPN) in CMOS progress gives a goodsolution for flicker noise problem.As a design example,the V-NPN is used as thegm-cell of a typical VCO.The close-in phase noise which is mainly generated by theflicker noise is improved without adding any power.Finally,the receiver front-end compatible with IEEE 802.15.4 is designed andmeasured,including a low noise amplifier (LNA) working at 2.4GHz and a passivemixer.The effect of the input parasitics on the low power LNA is analyzed and thedual gain mode is designed for better immunity to the large signals.Combined withthe channel select filter,the auto gain control and the analog to digital converter,theoverall receiver chip is fabricated in SMIC 0.18μm RF/Mixed signal process,based on the idea that improving the link margin with proper increasing the absolute powerconsumption of the receiver.The measured results show that the receiver has lowernoise figure and higher dynamic range.And,it shows lower network energy densitycompared with other present published works.