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Investigation And Implementation Of Key Technologies For Radio Frequency Identification Tag IC

Posted on:2008-02-26Degree:DoctorType:Dissertation
Country:ChinaCandidate:D S LiuFull Text:PDF
GTID:1118360272966765Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Radio Frequency Identification (RFID) is an automatic identification technology which is used for identification of different objects and collecting relative information. In recent years, Radio Frequency Identification technology has been seen rapid growth in areas of supply chain management, access control, public transportation, airline baggage tracking, etc. As the requirements of these applications vary, the systems are adapted in recent development steps. The need for lower cost and longer reading distances is increasing, while stringent regulation of transmit power and bandwidth have to be met. RFID tags are often classified as passive or active. The passive tag is energized by an electromagnetic radio frequency (RF) wave transmitted by the reader, while the active tag is energized by battery. Passive tags have the virtues of lower cost and longer life. The design and implementation of RFID tag IC are investigated in this thesis.First of all, the mathematical models of RFID systems based on inductive coupling and backscatter are described. To carry out the design and verification of the tag IC, the procedures of power and data transfer between transponder and reader have been studied in particular.Secondly, most of the efforts are distributed on the key technologies of RFID tag IC such as converting RF signal power to DC power, embedded EEPROM memory with low cost and power, and authentication for security and privacy. Long-range RFID system requires high Power Conversion Efficiency (PCE) of the rectifier. By virtue of the investigation on NMOS gate cross-connected rectifier and charge pump multiplier, this paper proposes optimized methods in order to improve supply efficiency of the available RF input power and PCE of the charge pump multiplier, and the PCE of implemented NMOS gate cross-connected rectifier achieves 34.46%.A 2-Kbit embedded EEPROM memory, operating over a wide voltage range from 2 .5V to 5V (typically 3.3V), has been designed and fabricated with SMIC 0.35-μm 2P3M CMOS embedded EEPROM process. The method of adding control transistors improves the static power dissipation. The transient power consumption of the charge pump circuit is greatly reduced by using slowly varying clock. The proposed sense amplifier using voltage sensing method also largely improves the read power dissipation. By employing these techniques, a low-power embedded EEPROM memory with 40μA read current, 20μA standby current and 250μA page write current has been presented. Furthermore, optimization design of decoder for selecting active array cells and power distribution for operating EEPROM effectively reduces the die size. being merely about 0.4mm2.Message Authentication Codes (MACs) can be built around a Hash function. This thesis proposes a light-weight RFID mutual authentication protocol relying on universal Hash functions and the ISO/IEC 15693-compatible protocol commands. The technique of multi-hashing and Toeplitz approach is used for generating 64 bits authentication codes. The implementation of the mutual authentication protocol uses only 1604 cells and consumes 130μW.Finally, the ISO/IEC 15693-compatible RFID transponder IC is implemented in SMIC 0.35-μm three-metal two-poly mixed signal CMOS technology with embedded EEPROM. A simulation model of the transponder IC is proposed. The simulation results show that the transponder IC, with 1.5mm×1.5mm die size, can operate over a wide range of electromagnetic field strength from Hmin(150 mA/m) to Hmax(5 A/m).
Keywords/Search Tags:Radio Frequency Identification, tag IC, RF analog front-end, rectifier, Power Conversion Efficiency, embedded EEPROM memory, low power, mutual authentication
PDF Full Text Request
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