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Research On Compatibility Technology Of PIC

Posted on:2008-12-14Degree:DoctorType:Dissertation
Country:ChinaCandidate:H HongFull Text:PDF
GTID:1118360215994679Subject:Microelectronics and Solid State Electronics
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Driven by the development of microelectronics technology and powerelectronics, the Power Integrated Circuits (PICs) are booming quickly, and arewidely used in motor drivers, power management, automotive and flat-panel display.Recently, many new technologies and devices are raised and PSoC (Power Systemon Chip) is coming to the fore. However, the further development of the PICs isrestricted by the cost and process complexity of integration. Therefore, it issignificant to do research into the compatibility technology and design flow of PICs,to develop the BCD (Bipolar-CMOS-DMOS) process with our own intellectualproperty (IP) rights and to implement the corresponding power IC chips.The work of this dissertation is devoted to the research on the compatibilitytechnology and the PIC design flow, including the process flow, device structure andcircuit design. The main contents and innovative points of this dissertation are listedbelow.A BCD technology scheme named BCDZ1 is proposed for the manufacture ofmonolithic smart PICs, in which high blocking voltage more than 500V is achieved.In the BCDZ1 process scheme, the no-epitaxial double-RESURF LDMOS isintegrated with the low-voltage PWM controller to constitute a PWM switch smartpower IC. The test results show that the breakvoltage of the LDMOS is about 700V,and good function and performance of the PWM switch power IC with the LDMOSare achieved. Then the PIC is used in the switch power supply applications, andworks very well. The feasibility and the validity of BCDZ1 technology scheme areverified.A BCD technology scheme named BCDZ2 is proposed for the manufacture ofthe PICs with high blocking voltage below 200V and low on-resistance. In theBCDZ2 process scheme, the vertical DMOS is integrated with the level-shifter andlow-voltage control circuit, and a high-voltage fiat-display driver IC is implemented.This BCDZ2 technology scheme further simplifies the process steps, reduces process complexity and cost. The test results show that all the devices implementedwith BCDZ2 have reached the design specifications and the corresponding PDPscan driver IC is realized. The success of the PDP scan driver IC also confirms thevalidity of the proposed BCDZ2 technology scheme.A PDP scan driver IC is designed and implemented to verify the feasibility ofthe BCDZ2 technology scheme. All of the functions of the PDP system requiredare realized by the PDP scan driver IC. It is able to work under the voltage 15~160V,and also provides high driving current. The PIC is implemented with the BCDZ2process. The test results show that the functions and performance of this PDP scandriver IC are achieved, and the maximum operational frequency is 20MHz. As thekey parameters estimating the driving capability, the rising and falling time are165ns and 30ns under test conditions of Vpp=90V and CL=200pF, respectively.An in-depth study is carded out to reduce the on-resistance of the integratedVertical DMOS in the BCDZ2 technology scheme. A 3-dimension analytical modelis proposed to calculate its on-resistance and specific on-resistance. Since all thecontacts of the integrated VDMOS are on the top side of the chip, the calculationand characteristic of its on-resistance are not identical with the conventionalVDMOS. The on-resistance of an integrated VDMOS varies with the placement andthe number of source cells. So the cell layout and the side number of drain contactsneed to be considered in the design of the integrated VDMOS. Using this model, theoptimal layout of the integrated VDMOS with a minimal specific on-resistance canbe achieved within a limited chip area, and the corresponding number of cells M×Nand side number of drain contacts can be calculated.The work of this dissertation is focused on the PIC compatibility technologyand the corresponding design realization. It provides two different BCD technologyschemes for PIC design, and two corresponding PIC chips are designed andmanufactured. The two technology schemes are distinct obviously for differentapplications, and they provide some degrees of freedom of the PIC design. Thesuccess of two BCD process indicates that the domestic manufacture of BCD process with our own intellectual property rights is realizable. The work of thisdissertation provides some experiments for further PIC process and circuitryresearch, and also makes some preparation for technology transfer andindustrialization.
Keywords/Search Tags:Power Integrated Circuit, Compatibility technology, Bipolar-CMOS-DMOS process, LDMOS, PWM switch power IC, VDMOS, On-resistance, PDP scan driver IC
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