Design Of An Ameliorative Low Power Controller Of SMPS

In recent years, the IC designs are developing flourishingly. On one hand, since the 1970's,the integration of the circuits are four times biennially, and the cost are reduced, just according with the LAW of Moore. On the other hand, with the rapid development of the technology of power integration, a new embranchment of IC is enmergence. This embranchment means Power IC. It makes the output of chips a Power Interface of directely to the load. In now days, the Power IC is not only applied as Power interface, but also directly applied in a lots of fields, such as power supply, electronic of motor. So, the products of Power IC will have a large market. The technology of BCD (Bipolar-CMOS-DMOS) is a new technology that integrates the high voltage MOSFET and the BiCMOS circuit in a chip. This new technology is applied in the produce of Power IC because it make the Power IC more credibility and more effectible.The thesis describes a design of an ameliorative controller of PWM switching mode power supplies (SMPS) with the characteristic of low power. This design is just for the request of low power when SMPS is applied for the portable electronics with off-time mode. We analyse the short of conventional Current Mode Operation and the conventional Power Limiting, and bring forward the amelioration .This will reduce the area of the chip and its reliability. And we also add several circuits, such as the protection of over voltage and the protection of under voltage, and the Leading-Edge Blanking, and so on. This thesis also recommends the technology of BCD, and brings forward the request of the model for the chip. Finally, we make a simulation for the primary functions. And in the last of the thesis, we bring some idea of the further research.