SOC Design For GSM Handset Baseband Processing

Currently GSM is still the main stream in the wireless communication market. The dissertation focuses on key technologies of GSM handset baseband chip SOC design, including GSM channel coding/decoding, heterogeneous system communication scheme, low power Cache system, on chip bus (OCB) and RTL level SOC test methods etc.In GSM channel coding/decoding this paper focuses on FIRE code used in control channel, and a reusable FIRE coder is developed which can be used both for coding and decoding.A real time heterogeneous system communication scheme, which maintains the coherency between design and verification, is proposed. A method for solving metastability in heterogeneous system with high efficiency is also proposed.Exploiting the nature of Cache system and combining the development on low power Cache design in recent years, a low power Cache system is designed.The dissertation discusses OCB system in detail, and a new classification method for OCB is proposed based on the data flow. A low power AMBA bus system is implemented. In order to separate the core logic from bus interface, a new local bus is defined. With this local bus the complicated bus protocol is simplified as access attributes of individual addresses, and the tool for automatic generation of bus interface is also developed. As a result the core logic designer can be freed from the complexity of bus protocol.The dissertation also does some works on RTL level test of SOC design. With the RTL stuck-at fault model, a new RTL fault simulation method is proposed based on RTL level signal size and language operator types, and two auxiliary software tools for applying this new method are also developed. The experimental results prove its efficiency.Future directions, such as GSM IP technology, low power bus and memory system and formal verification method of OCB, are briefly discussed.